Why is it in News?
- 15 December 2025: Ministry of Electronics & IT (MeitY) announced the launch of DHRUV64, an indigenous microprocessor.
- Developed by C-DAC under the Microprocessor Development Programme.
- Projected as a key step in building India’s indigenous processor pipeline and reducing dependence on imported chip designs.
Relevance
GS III – Science & Technology
- Indigenous semiconductor and processor development
- Digital sovereignty and strategic technologies
- Electronics manufacturing ecosystem
- RISC-V and open-source hardware architecture
What is DHRUV64?
- Type: General-purpose microprocessor
- Architecture: 64-bit, dual-core
- Clock speed: ~1 GHz
- Developer: Centre for Development of Advanced Computing (C-DAC)
- Parent Ministry: MeitY
- Instruction Set: RISC-V (open standard)
- Role: Acts as the “brain” of electronic systems, capable of running operating systems and embedded applications.
Why Microprocessors Matter Strategically
- Microprocessors sit at the base layer of:
- Telecom networks
- Industrial control systems
- Automotive electronics
- Defence and space systems
- Control over processor design + toolchain + update pathways implies:
- Digital sovereignty
- Cybersecurity assurance
- Supply-chain resilience during sanctions or export controls
- India is a major consumer but a minor designer/manufacturer of processors.
What Do DHRUV64’s Specifications Mean?
Capability Assessment
- 64-bit design:
- Enables modern operating systems and contemporary software stacks.
- 1 GHz, dual-core:
- Modest by consumer standards
- Adequate for:
- Telecom base stations
- Routers
- Industrial automation
- Automotive modules
- Not designed for:
- High-end smartphones
- AI-heavy consumer computing (no GPU/AI accelerators disclosed)
Comparative Perspective
- Global top-tier processors:
- Multiple cores
- Higher clock speeds
- Integrated GPUs and AI blocks
- DHRUV64 prioritises:
- Reliability
- Determinism
- Hardware–software co-design
- Suitable for mission-critical but non-consumer workloads.
India’s Indigenous Processor Ecosystem
DHRUV64 is not standalone, but part of a broader pipeline:
| Processor | Institution | Use Case |
| SHAKTI | IIT Madras | Strategic & commercial systems |
| AJIT | IIT Bombay | Control systems |
| VIKRAM | ISRO–SCL | Space applications |
| THEJAS64 (2025) | C-DAC | Industrial & strategic |
| DHRUV64 | C-DAC | Platform-level processor |
DIR-V Programme (Digital India RISC-V)
What is RISC-V?
- An open instruction set architecture (ISA).
- No licensing fees for the ISA itself.
- Modular and extensible design.
Why Governments Prefer RISC-V
- Avoids dependence on proprietary ISAs (e.g., ARM, x86).
- Enables:
- Strategic autonomy
- Domestic innovation
- Custom security features
DIR-V Objectives
- Build a portfolio of RISC-V processors for:
- Industry
- Defence
- Consumer electronics
- DHRUV64 is the third DIR-V chip after:
- THEJAS32 (fabricated in Malaysia)
- THEJAS64 (fabricated at SCL Mohali)
Key Gaps & Unanswered Questions (Critical Analysis)
1. Performance Transparency
- No benchmarks disclosed:
- IPC, SPEC scores
- Cache sizes
- Memory controller features
- Performance per watt
2. Fabrication Ambiguity
- Foundry and process node not disclosed.
- Raises concerns about:
- Supply-chain sovereignty
- Yield and reliability
- Long-term availability (critical for telecom/auto sectors)
3. Meaning of “Fully Indigenous”
- Ambiguous claim:
- Indigenous ISA? (No — RISC-V is open, not Indian-origin)
- Indigenous core microarchitecture?
- Indigenous SoC integration?
- Indigenous fabrication?
- Indigenous toolchain?
- “Indigenous” may currently apply mainly to design ownership, not the entire value chain.
4. Ecosystem Readiness
- No clarity on:
- Developer boards
- OS support (Linux, RTOS, etc.)
- Security certifications
- Government anchor procurement
- Without an ecosystem, processors fail commercially.
5. Roadmap Uncertainty
- Next processors announced:
- DHANUSH: 1.2 GHz, quad-core, ~28 nm
- DHANUSH+: 2 GHz, quad-core, ~14/16 nm (reported)
- No timelines or fabrication commitments disclosed.
Supporting Policy Ecosystem
Key Government Schemes
- Chips to Startup Programme
- ₹250 crore over 5 years
- Focus: training, prototyping, startups
- Design Linked Incentive (DLI) Scheme
- Encourages domestic chip design firms
- INUP-i2i
- Access to nanofabrication facilities
Manufacturing Push
- India Semiconductor Mission (ISM):
- 10 projects approved
- 6 States
- Investment: ₹1.6 lakh crore
Strategic Significance
1. Technological Sovereignty
- Reduces reliance on foreign-controlled architectures.
- Critical during geopolitical disruptions.
2. Defence & Strategic Autonomy
- Indigenous processors essential for:
- Secure communications
- Weapon systems
- Space missions
3. Platform Approach
- DHRUV64 positioned as:
- A testbed for startups, academia, and industry
- Lower-cost prototyping without foreign chips
- Success depends on:
- Software stacks
- Reference designs
- OEM adoption
Way Forward
- Publish transparent technical documentation.
- Ensure:
- Anchor procurement by government agencies
- Strong software & OS ecosystem
- Clear fabrication roadmap within India
- Move from one-off chips to SoC families.
- Align processor design with:
- Telecom standards
- Automotive safety norms
- Defence certifications
