Question
Which of the following statements about DHRUV64 is/are correct?
1It is the third chip fabricated under the DIR-V Programme with an overall aim to enable the creation of microprocessors for India.
2It is India’s first homegrown 1.0 GHz, 64-bit dual-core microprocessor.
A1 only
B2 only
CBoth 1 and 2 ✓
DNeither 1 nor 2
✓
Correct Answer: (C) Both 1 and 2 — both statements are confirmed from official sources
Third chip under DIR-V (after THEJAS32 and THEJAS64) · India’s first 1.0 GHz, 64-bit dual-core processor by C-DAC
Each Statement — All Details Confirmed
1
✓ Correct — third chip under DIR-V
Third chip fabricated under the DIR-V Programme to enable microprocessor creation for India
Confirmed verbatim from official government release. The NFA Post reported the exact government statement: “DHRUV64 is the third chip fabricated under the DIR-V Programme with an overall aim to enable creation of Microprocessors for the future in India.”The two preceding chips in the DIR-V Programme were:
• THEJAS32 — First chip (32-bit) · Fabricated at Silterra, Malaysia
• THEJAS64 — Second chip (64-bit, single-core) · Fabricated at Semiconductor Laboratory (SCL), Mohali, India
• DHRUV64 — Third chip (64-bit, dual-core, 1.0 GHz) — the most advanced so far
DIR-V = Digital India RISC-V Programme · Based on open-source RISC-V architecture (no licence costs) · Under MeitY guidance · Atmanirbhar Bharat in semiconductors
✓ Sequence: THEJAS32 (1st) → THEJAS64 (2nd) → DHRUV64 (3rd)
Next in pipeline: DHANUSH64 and DHANUSH64+ (System on Chip variants — under development)
2
✓ Correct — India’s first 1.0 GHz 64-bit dual-core processor
India’s first homegrown 1.0 GHz, 64-bit dual-core microprocessor
Confirmed from multiple sources including official government release, EE Times, Republic World.Key specifications of DHRUV64:
• Architecture: 64-bit RISC-V (open-source)
• Cores: Dual-core (India’s first indigenous dual-core 64-bit)
• Clock speed: 1.0 GHz
• I/O voltage: 1.8V
• Developer: C-DAC (Centre for Development of Advanced Computing)
• Programme: Microprocessor Development Programme (MDP) under MeitY
• Applications: 5G networks, automotive, IoT, consumer electronics, industrial automation, defence
✓ India’s first: 64-bit + dual-core + 1.0 GHz — three firsts in one chip
Designed entirely in India by C-DAC · RISC-V open architecture (no licence fees) · Supports Linux · PCIe, SATA, USB 2.0, Ethernet, SD/eMMC, DMA on-chip
DIR-V Programme — Chip Roadmap (Digital India RISC-V)
🔬 DIR-V Chip Sequence — RISC-V Indigenous Processors
1
THEJAS32 — 32-bit · First DIR-V chip · Fabricated at Silterra, Malaysia
2
THEJAS64 — 64-bit, single-core · Second DIR-V chip · Fabricated at Semiconductor Laboratory (SCL), Mohali, India (domestic fabrication)
3
DHRUV64 — 64-bit, dual-core, 1.0 GHz · Third DIR-V chip · India’s first homegrown 1.0 GHz 64-bit dual-core processor · Launched December 2025
4
DHANUSH64 + DHANUSH64+ — System on Chip (SoC) variants · Currently under development · Next generation in the roadmap
DHRUV64 — Complete Fact Sheet for UPSC
| Parameter | Detail |
| Full name | DHRUV64 Microprocessor |
| Developed by | Centre for Development of Advanced Computing (C-DAC) under Microprocessor Development Programme (MDP) |
| Ministry | Ministry of Electronics and Information Technology (MeitY) |
| Programme | Digital India RISC-V (DIR-V) Programme — third chip |
| Architecture | 64-bit RISC-V (open-source, no licence costs) |
| Key specs | 1.0 GHz · Dual-core · 64-bit · 1.8V I/O · India’s first indigenous 64-bit dual-core |
| Launch | December 2025 · 19 MoUs/agreements context — India’s semiconductor self-reliance push |
| Applications | 5G networks · Automotive systems · Consumer electronics · Industrial automation · IoT · Defence |
| Significance | Reduces India’s dependence on imported processors · India consumes ~20% of global microprocessor output (mostly imported) · Supports Atmanirbhar Bharat in semiconductors |
| Next chips | DHANUSH64 + DHANUSH64+ (SoC variants) — under development |
Memory Trick
🧠 DHRUV64 — Key Facts to Lock In
Third chip: T-T-D: THEJAS32 → THEJAS64 → DHRUV64. Two THEJAS, then one DHRUV. “Two T’s then D.” Thejas = light/brilliance in Sanskrit · Dhruv = North Star (fixed, guiding). The naming reflects progression from light to the polar star of Indian chip design.
Three firsts in DHRUV64: India’s first (1) 64-bit + (2) dual-core + (3) 1.0 GHz homegrown processor. THEJAS64 was 64-bit but single-core and slower. DHRUV64 = the first dual-core version at 1.0 GHz — three records broken in one chip.
DIR-V = Digital India RISC-V: Open-source RISC-V architecture = no licence fees = India can design, share, and innovate freely. Part of MeitY’s broader semiconductor ecosystem: DIR-V + Chips to Startup (C2S) + India Semiconductor Mission + Design Linked Incentive Scheme + INUP-i2i.


